The purpose of an IQ generator is to generate 90° phase-shifted signals I and Q.
FIG. 1 shows an IQ generator 10 including a master flip-flop DFF1 and a slave flip-flop DFF2. A clock signal DCLK is fed to a non-inverting clock input CLK of the master flip-flop DFF1 and to an inverting clock input XCLK of the slave flip-flop DFF2. A non-inverted output Q of the master flip-flop DFF1 is fed to a non-inverting input D of the slave flip-flop DFF2. An inverted output XQ of the slave flip-flop DFF2 is fed back to a non-inverting input D of the master flip-flop DFF1. The non-inverted output Q of the master flip-flop DFF1 produces an I signal and a non-inverted output Q of the slave flip-flop DFF2 produces a Q signal, which lags the I signal by approximately 90°. Owing for example to signal path mismatches in the circuit, the phase lag may not be exactly 90°.